RISC-V has 32 registers x0-x31, though these are usually referred to by their conventional (ABI) names (zero, ra, sp, gp, tp, t0-t6, s0-s11, a0-a7). dev/bus/usb/001/004), so a udev rule to automatically set permissions can be added to a file /etc/udev/rules.d/les with the following: – # Longan Nano, make the device world writeable.ĪTTRS Bits of RISC-V that confused me at first You may not have permissions to access the USB device (e.g. Therefore, a patched dfu-utils, linked further down, is necessary. The (de-facto?) standard seems to be a string format with BASE_ADDRESS/SECTORS*SECTOR_SIZE(B|K|M), and the Nano, with 128K of flash, with a 1K block size, reports 0x08000000/512*002K, which means 512 x 2K sectors. However it seems that the Longan Nano doesn’t follow standard practise in describing its flash layout via USB descriptors. On Debian, there’s a package dfu-utils that communicates with devices that implement DFU.
CSR USB TO SPI CONVERTER SCHEMATIC FOR MAC UPGRADE
Holding down the BOOT0 button while pressing RESET boots the device from the bootloader, which is 18K of flash that implements the Device Firmware Upgrade ( DFU) protocol, which (I have discovered) is a USB specification for flashing firmware over USB. The first thing I did was plug it into a USB socket and watch the 160×80 screen backlight come on, and a flashing LED. Peripherals like I2C, SPI, GPIO are unlikely to be documented here. Regardless, most of this content will relate to the stuff I’m unfamiliar with on the GD32VF platform. Hopefully it will take a more meaningful form, but for now expect a chronological order on whatever distraction I happen to have succumbed to. This post serves as a brain, link, and file dump – an disorganised reference for anything I need to keep regarding the Nano. 16-bit opcodes for commonly used instructions, useful for this memory constrained device). The GD32V implements an RV32IMAC CPU, where ‘RV32I’ refers to a 32-bit CPU with the Base Integer Instruction Set, the ‘M’ denotes the Standard Extension for Integer Multiplication and Division, the ‘A’ denotes the Extension for Atomic Instructions, and the ‘C’ refers to the Extension for Compressed Instructions (i.e. There are links below if you want details on this board. Sipeed’s Longan Nano, a small board based on the GigaDevice GD32VF103 SoC is just that a RISC-V CPU with a bundle of decent peripherals. This was an impulse purchase, because for some unfathomable reason I really wanted a RISC-V CPU to play with.